NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE
| Data type |
Access | Coercion | High Level Functions |
|---|---|---|---|
| ViString | R/W | None | niRFSG_ConfigurePXIChassisClk10 |
Description
Specifies the clock source for driving the PXI 10 MHz backplane reference clock. This option can only be configured if the upconverter is in Slot 2 of a PXI chassis. To set this attribute, the NI-RFSG device must be in the Configuration state.
Valid Timing Configurations:
| NIRFSG_ATTR_PXI_CHASSIS_CLK10_SOURCE Setting | NIRFSG_ATTR_REF_CLOCK_SOURCE Setting |
|---|---|
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_ONBOARD_CLK_STR (these settings are not valid on the NI 5672) | NIRFSG_VAL_ONBOARD_CLK_STR (this setting is not valid on the NI 5672 |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_REF_IN_STR |
| NIRFSG_VAL_NONE_STR, NIRFSG_VAL_REF_IN_STR | NIRFSG_VAL_PXI_CLK10_STR |
Defined Values:
| Value | Description |
|---|---|
| NIRFSG_VAL_NONE_STR | Do not drive the PXI_CLK10 signal. |
| NIRFSG_VAL_ONBOARD_CLK_STR | Use the highly stable oven-controlled onboard reference clock to drive the PXI_CLK10 signal. This value is not valid on the NI 5672. |
| NIRFSG_VAL_REF_IN_STR | Use the clock present at the front panel REF IN connector to drive the PXI_CLK10 signal. |
Default Value: NIRFSG_VAL_NONE_STR
Supported Devices: NI 5670/5671/5672