What Are PXI Triggers?

NI MAX Help for PXI

What Are PXI Triggers?

PXI triggers are signals that are often used to synchronize events between devices in a chassis. These signals are asserted or de-asserted by devices in the chassis and are passed to other devices through trigger lines on the backplane of the chassis. Each trigger bus on a chassis backplane contains eight PXI trigger lines (PXI_Trig0 through PXI_Trig7). Each slot in a PXI chassis is connected to a single trigger bus and can transmit and receive signals over the trigger lines from any other device on the same bus. Most chassis contain only a single trigger bus, but some chassis, such as the NI PXI-1045, have multiple trigger buses.

Chassis with a Single Trigger Bus

In chassis containing only a single bus, all slots share the same trigger bus and can communicate to each other using this bus. For example, the NI PXI-1042 chassis has one trigger bus, and all slots (1-8) reside on this trigger bus. In this situation, a device in any slot can use the backplane to send triggers to a device in any other slot.

Chassis with Multiple Trigger Buses

Normally, if a chassis has more than one trigger bus, a device in a slot connected to one trigger bus cannot use the trigger lines to communicate to a device connected to another trigger bus in the same chassis. For example, the NI PXI-1045 chassis has 18 slots and three trigger buses. In this chassis the slots are assigned to the trigger buses as follows: trigger bus 1: slots 1-6; trigger bus 2: slots 7-12; and trigger bus 3: slots 13-18. Without further configuration, the NI PXI-1045 trigger buses function like three separate single-segment chassis.

Note  Some multibus chassis such as the NI PXI-1045 can forward trigger signals between buses. Many National Instruments products such as NI-DAQmx will, when necessary, dynamically route trigger signals between the separate trigger buses in these chassis. Routes can also be statically configured for compatibility with legacy programs using the chassis' Triggers pane in MAX.
Note Note  Refer to the KnowledgeBase article 32GFMIWD, Routing PXI Trigger Lines Across the Buses of Multisegment PXI Chassis, to learn more about trigger routing in multisegment PXI chassis.