NIFGEN_ATTR_SAMPLE_CLOCK_SOURCE
Specific Attribute
| Data type |
Access | Applies to | Coercion | High Level Functions |
|---|---|---|---|---|
| ViString | R/W | N/A | None | None |
Description
Specifies the Sample Clock source.
 |
Note The signal generator must not be in the Generating state when you change this attribute. To change the device configuration, call the niFgen_AbortGeneration function or wait for the generation to complete. |
| The following defined values are examples of possible sample clock sources. For a complete list of the sample clock sources available on your device, refer to the Device Routes tab in MAX. |
Defined Values
| "OnboardClock" | Onboard clock |
| "ClkIn" | front panel connector |
| "PXI_Star" | PXI Star line |
| "PXI_Trig0" | PXI or RTSI line 0 |
| "PXI_Trig1" | PXI or RTSI line 1 |
| "PXI_Trig2" | PXI or RTSI line 2 |
| "PXI_Trig3" | PXI or RTSI line 3 |
| "PXI_Trig4" | PXI or RTSI line 4 |
| "PXI_Trig5" | PXI or RTSI line 5 |
| "PXI_Trig6" | PXI or RTSI line 6 |
| "PXI_Trig7" | PXI or RTSI line 7 |
| "DDC_ClkIn" | Sample clock from DDC connector |
Default Value: "OnboardClock"