NIFGEN_ATTR_CLOCK_MODE
Specific Attribute
| Data Type | Access | Applies to | Coercion | High-Level Functions |
|---|---|---|---|---|
| ViInt32 | R/W | N/A | None | None |
Description
Controls which clock mode is used for the signal generator.
For signal generators that support it, this attribute allows switching the sample clock to High-Resolution mode. When in Divide-Down mode, the sample rate can only be set to certain frequencies, based on dividing down the update clock. However, in High-Resolution mode, the sample rate may be set to any value.
Defined Values
| NIFGEN_VAL_DIVIDE_DOWN | Divide down sampling—Sample rates are generated by dividing the source frequency. |
| NIFGEN_VAL_HIGH_RESOLUTION | High resolution sampling—Sample rate is generated by a high–resolution clock source. |
| NIFGEN_VAL_AUTOMATIC | Automatic Selection—NI-FGEN selects between the divide–down and high–resolution clocking modes. |
Default Value: Depends on the device