Digital Filtering Considerations for C Series and M Series Devices
Digital debouncing filters are only supported on counter inputs. Each PFI line can independently select from three fixed values (125 ns, 6.425 µs, 2.55 ms). For each counter input attribute/property, there are two attributes/properties associated with digital debounce filtering: Digital Filter Enable and Digital Filter Minimum Pulse Width.
When you set the Digital Filter Enable to true, you must also configure the Digital Filter Minimum Pulse Width attribute/property. This value represents the minimum value that is guaranteed to pass into the STC II. Refer to your device documentation to determine the minimum pulse width guaranteed to be blocked.
The following table lists the counter input terminals that can be digitally filtered.
| Type | Attribute/Property |
|---|---|
| Channel | Frequency Input Terminal |
| Period Input Terminal | |
| Count Edges Input Terminal | |
| Count Edges Count Direction | |
| Position A Input Terminal | |
| Position B Input Terminal | |
| Position Z Input Terminal | |
| Pulse Width Input Terminal | |
| Two-Edge First Input Terminal | |
| Two-Edge Second Input Terminal | |
| Semi-Period Input Terminal | |
| Counter Input Timebase Source | |
| Counter Output Timebase Source | |
| Timing | Sample Clock Source |
| Triggering | Start Trigger Source |
| Pause Trigger Source | |
| Arm Start Trigger Source |