Invoke Method Function

FPGA Interface Functions

Invoke Method Function

Owning Palette: FPGA Interface Functions

Installed With: FPGA Interface

Invokes an FPGA Interface method or action from a host VI on an FPGA VI. Use methods to do the following: download, abort, reset, and run the FPGA VI on the FPGA target, wait for and acknowledge FPGA VI interrupts, read DMA FIFOs, and write to DMA FIFOs. The methods you can choose from depend on the target hardware and the FPGA VI. You must wire the FPGA VI Reference In input to view the available methods in the shortcut menu.

Details  

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FPGA VI Reference In is the reference to the FPGA VI running on the FPGA target. You must open a reference to the FPGA VI to use this parameter.
error in describes error conditions that occur before this VI or function runs. The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs except where noted otherwise. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code. Use exception control to treat what is normally an error as no error or to treat a warning as an error. Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
status is TRUE (X) if an error occurred before this VI or function ran or FALSE (checkmark) to indicate a warning or that no error occurred before this VI or function ran. The default is FALSE.
code is the error or warning code. The default is 0. If status is TRUE, code is a nonzero error code. If status is FALSE, code is 0 or a warning code.
source specifies the origin of the error or warning and is, in most cases, the name of the VI or function that produced the error or warning. The default is an empty string.
FPGA VI Reference Out returns a reference to the FPGA VI running on the FPGA target.
error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces. Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
status is TRUE (X) if an error occurred or FALSE (checkmark) to indicate a warning or that no error occurred.
code is the error or warning code. If status is TRUE, code is a nonzero error code. If status is FALSE, code is 0 or a warning code.
source describes the origin of the error or warning and is, in most cases, the name of the VI or function that produced the error or warning.

Invoke Method Details

You can invoke the following FPGA Interface methods on most FPGA targets to control the FPGA VI. You might have fewer or more methods available depending on the FPGA target. Refer to the specific FPGA target hardware documentation for information about the FPGA Interface methods you can use.

  • FIFO—Displays one of the following methods you can use to read from or write to a Direct Memory Access (DMA) FIFO in the FPGA VI. FIFO is the name of the FIFO item in the project.
    • Configure—Allows you to specify the depth of the host memory part of the DMA FIFO. This method is optional.
      Depth specifies the number of elements in the host memory part of the DMA FIFO. If you do not wire this parameter, the Invoke Method function uses a default of 10,000 elements. If you place the FIFO Configure method after a FIFO Start or FIFO Read method in the data flow, the Invoke Method function sets the new depth when the next FIFO Start or FIFO Read method executes.
    • Start—Begins DMA data transfer between the FPGA target and the host computer. This method is optional. The FIFO Read and FIFO Write methods automatically start DMA data transfer. You might want to use this method if you want to start data transfer with the DMA FIFO before you read the first element of the FIFO.
    • Read—Reads elements of the DMA FIFO from the host memory part of the FIFO. The Read method returns Data when the Number of Elements is available or when the Timeout (ms) period ends.
      Note  The Read method is available only if the FIFO Type is Target to Host—DMA in the General FPGA FIFO Properties page.
      Number of Elements determines the number of elements you read from the DMA FIFO.
      Timeout (ms) specifies the number of milliseconds the Invoke Method function waits before timing out. The default is 5000 milliseconds. Set this parameter to –1 if you want the Invoke Method function to wait indefinitely for the number of elements.
      Data returns the data contained in the host memory part of the DMA FIFO.
      Elements Remaining returns the number of elements remaining in the host memory part of the DMA FIFO.
    • Write—Writes elements to the DMA FIFO from the host VI. The Write method returns Empty Elements Remaining when the data is written or when the Timeout (ms) period ends.
      Note  The Write method is available only if the FIFO Type is Host to Target—DMA in the General FPGA FIFO Properties page.
      Data specifies the data that you want to transfer to the FPGA target.
      Timeout (ms) specifies the number of milliseconds the Invoke Method function waits before timing out. The Invoke Method function times out if the host part of the FIFO does not contain enough space to write Data to by the time the number of milliseconds you specify elapse. The default is 5000 milliseconds. Set this parameter to –1 if you want the Invoke Method function to wait indefinitely.
      Empty Elements Remaining returns the number of empty elements remaining in the host memory part of the DMA FIFO.
    • Stop—Stops the DMA data transfer between the FPGA target and the host computer. This method empties all data from the host memory and FPGA parts of the FIFO. This method is optional. Most applications do not require using the Stop method. If an error occurred before this method runs, the method runs normally and passes the error in value to error out. If an error occurs while this method runs, the method runs normally and merges error in and its own error status to produce error out.
  • Run—Runs the FPGA VI on the FPGA target. If the FPGA VI is already running on the FPGA target, the Run method does nothing.
    Wait Until Done (F) makes the Invoke Method function wait until the FPGA VI finishes running. If you set this parameter to TRUE, make sure the FPGA VI terminates execution on its own.
  • Abort—Aborts the opened and running FPGA VI on the FPGA target. This method does not reset the default values in the FPGA VI. If an error occurred before this method runs, the method runs normally and passes the error in value to error out. If an error occurs while this method runs, the method runs normally and merges error in and its own error status to produce error out.
  • Reset—Aborts and resets the FPGA VI on the FPGA target to the default state of the VI. This method sets the FPGA VI controls and indicators to their default states, sets uninitialized shift registers to their default values, clears FIFOs, and sets global variables to their default values. This method does not reset memory. If an error occurred before this method runs, the method runs normally and passes the error in value to error out. If an error occurs while this method runs, the method runs normally and merges error in and its own error status to produce error out.
  • Wait on IRQ—Waits for any number of interrupt requests you included in the compiled FPGA VI running on the FPGA target. Always acknowledge interrupts after they occur using the Acknowledge IRQ method. You can use several calls to the Wait on IRQ method to implement waiting on different interrupts from different places in a VI. If you do so, National Instruments recommends that you specify non-overlapping interrupts for different Wait on IRQ method calls.
    Note  The Wait on IRQ method consumes threads. If you use too many calls to the Wait on IRQ method, other code in the application might stop executing until an interrupt occurs. If you notice unexpected execution behavior, try reducing the number of calls or put the Wait on IRQ methods in subVIs in different execution systems. Use the Execution Properties page to specify the execution system.
    IRQ Number(s) specifies the logical interrupt or array of logical interrupts for which the function waits. The default is 0. Typical supported values are 0 through 31.
    Timeout (ms) specifies the number of milliseconds the VI waits before timing out. Wire a –1 for an infinite timeout. The default is 0. If you do not wire this parameter and no interrupt is received, the Invoke Method function times out immediately.
    Timed Out returns TRUE if this method has timed out.
    IRQ(s) Asserted returns the asserted interrupts. If you are waiting for a single interrupt, a value of –1 indicates that the interrupt was not received. If you are waiting for multiple interrupts, an empty array indicates that no interrupts were received.
  • Acknowledge IRQ—Acknowledges and resets to the default value any interrupts that occur. After a successful Wait on IRQ method, use the Acknowledge IRQ method to acknowledge the source of the interrupt.
    IRQ Number(s) specifies the logical interrupt or array of logical interrupts the function acknowledges.
  • Download—Downloads the most recent version of the compiled FPGA VI or bitfile to the FPGA target. Make sure the front panel of the FPGA VI matches the front panel of the FPGA VI you open a reference to.
  • Get FPGA VI Execution Mode—Returns the FPGA VI execution mode. Use this method if you want to execute different code depending on where the FPGA VI executes.
    FPGA VI Execution Mode indicates where the FPGA VI executes. This enum can return FPGA Target, Development Computer with Simulated I/O, or Development Computer with Real I/O.
Note  If you use a host VI to communicate with an FPGA VI that is running on a development computer, you must be aware of special considerations for the host VI.