Communicating with an FPGA VI Running on a Development Computer (FPGA Interface)

LabView FPGA Interface

Communicating with an FPGA VI Running on a Development Computer (FPGA Interface)

The following list describes behavior to consider when you use a host VI to communicate with an FPGA VI that is running on a development computer with simulated I/O:

  • You must run the host VI on a Windows development computer to communicate with the FPGA VI. You cannot run the host VI on an RT target.
  • To execute different code on the host VI based on where the FPGA VI executes, use the Invoke Method function configured for the Get FPGA VI Execution Mode method.
  • The Up Cast function and the Abort, Reset, and Download methods on the Invoke Method function do not support running the FPGA VI on the development computer. If you use the Up Cast function or these methods, the host VI returns a run-time error.
  • Direct Memory Access (DMA) FIFOs are valid while either the host VI or FPGA VI are running. If both VIs stop running, DMA FIFOs lose all data.
  • Interrupts are valid only when the FPGA VI is running. If the FPGA VI stops running, all interrupt data is lost and any host interface waits return immediately.
  • If you use the Invoke Method function to read DMA FIFOs, the function might timeout more frequently because the FPGA VI is not running as fast on the development computer as it would on an FPGA target.
  • You must close the front panel window of the FPGA VI before running the FPGA VI if you want to use the Close FPGA VI Reference function to close the reference, stop the FPGA VI, and reset the FPGA VI running on the development computer. You must open the front panel window of the FPGA VI before running the FPGA VI if you want to use the Close FPGA VI Reference function to close the host reference without resetting the FPGA VI running on the development computer.