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STM32L4R9I-Discovery BSP User Manual
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stm32l4r9i_discovery_ospi_nor.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4r9i_discovery_ospi_nor.c 00004 * @author MCD Application Team 00005 * @brief This file includes a standard driver for the MX25LM51245G OSPI 00006 * memory mounted on STM32L4R9I_DISCOVERY board. 00007 @verbatim 00008 ============================================================================== 00009 ##### How to use this driver ##### 00010 ============================================================================== 00011 [..] 00012 (#) This driver is used to drive the MX25LM51245G OSPI external 00013 memory mounted on STM32L4R9I_DISCOVERY evaluation board. 00014 00015 (#) This driver need a specific component driver (MX25LM51245G) to be included with. 00016 00017 (#) Initialization steps: 00018 (++) Initialize the OPSI external memory using the BSP_OSPI_NOR_Init() function. This 00019 function includes the MSP layer hardware resources initialization and the 00020 OSPI interface with the external memory. 00021 00022 (#) OSPI memory operations 00023 (++) OSPI memory can be accessed with read/write operations once it is 00024 initialized. 00025 Read/write operation can be performed with AHB access using the functions 00026 BSP_OSPI_NOR_Read()/BSP_OSPI_NOR_Write(). 00027 (++) The function BSP_OSPI_NOR_GetInfo() returns the configuration of the OSPI memory. 00028 (see the OSPI memory data sheet) 00029 (++) Perform erase block operation using the function BSP_OSPI_NOR_Erase_Block() and by 00030 specifying the block address. You can perform an erase operation of the whole 00031 chip by calling the function BSP_OSPI_NOR_Erase_Chip(). 00032 (++) The function BSP_OSPI_NOR_GetStatus() returns the current status of the OSPI memory. 00033 (see the OSPI memory data sheet) 00034 @endverbatim 00035 ****************************************************************************** 00036 * @attention 00037 * 00038 * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> 00039 * 00040 * Redistribution and use in source and binary forms, with or without modification, 00041 * are permitted provided that the following conditions are met: 00042 * 1. Redistributions of source code must retain the above copyright notice, 00043 * this list of conditions and the following disclaimer. 00044 * 2. Redistributions in binary form must reproduce the above copyright notice, 00045 * this list of conditions and the following disclaimer in the documentation 00046 * and/or other materials provided with the distribution. 00047 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00048 * may be used to endorse or promote products derived from this software 00049 * without specific prior written permission. 00050 * 00051 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00052 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00053 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00054 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00055 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00056 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00057 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00058 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00059 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00060 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00061 * 00062 ****************************************************************************** 00063 */ 00064 00065 /* Includes ------------------------------------------------------------------*/ 00066 #include "stm32l4r9i_discovery_ospi_nor.h" 00067 00068 /** @addtogroup BSP 00069 * @{ 00070 */ 00071 00072 /** @addtogroup STM32L4R9I_DISCOVERY 00073 * @{ 00074 */ 00075 00076 /** @defgroup STM32L4R9I_DISCOVERY_OSPI_NOR STM32L4R9I_DISCOVERY OSPI NOR 00077 * @{ 00078 */ 00079 00080 /* Private constants --------------------------------------------------------*/ 00081 /** @defgroup STM32L4R9I_DISCOVERY_OSPI_NOR_Private_Constants Private Constants 00082 * @{ 00083 */ 00084 #define OSPI_NOR_OCTAL_DISABLE 0x0 00085 #define OSPI_NOR_OCTAL_ENABLE 0x1 00086 00087 #define DUMMY_CYCLES_READ_OCTAL MX25LM51245G_DUMMY_CYCLES_READ_OCTAL_66M 00088 #define DUMMY_CYCLES_CR_CFG MX25LM51245G_CR2_DC_66M 00089 /** 00090 * @} 00091 */ 00092 00093 /* Uncomment this line to use the memory in SDR mode */ 00094 //#define BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00095 00096 /* Private variables ---------------------------------------------------------*/ 00097 00098 /** @defgroup STM32L4R9I_DISCOVERY_OSPI_NOR_Private_Variables Private Variables 00099 * @{ 00100 */ 00101 OSPI_HandleTypeDef OSPINORHandle; 00102 00103 /** 00104 * @} 00105 */ 00106 00107 00108 /* Private functions ---------------------------------------------------------*/ 00109 00110 /** @defgroup STM32L4R9I_DISCOVERY_OSPI_NOR_Private_Functions Private Functions 00111 * @{ 00112 */ 00113 static void OSPI_NOR_MspInit (void); 00114 static void OSPI_NOR_MspDeInit (void); 00115 static uint8_t OSPI_NOR_ResetMemory (OSPI_HandleTypeDef *hospi); 00116 static uint8_t OSPI_NOR_WriteEnable (OSPI_HandleTypeDef *hospi); 00117 static uint8_t OSPI_NOR_AutoPollingMemReady(OSPI_HandleTypeDef *hospi, uint32_t Timeout); 00118 static uint8_t OSPI_NOR_OctalMode (OSPI_HandleTypeDef *hospi, uint8_t Operation); 00119 /** 00120 * @} 00121 */ 00122 00123 /* Exported functions ---------------------------------------------------------*/ 00124 00125 /** @addtogroup STM32L4R9I_DISCOVERY_OSPI_NOR_Exported_Functions 00126 * @{ 00127 */ 00128 00129 /** 00130 * @brief Initializes the OSPI interface. 00131 * @retval OSPI memory status 00132 */ 00133 uint8_t BSP_OSPI_NOR_Init(void) 00134 { 00135 OSPIM_CfgTypeDef OSPIM_Cfg_Struct; 00136 00137 OSPINORHandle.Instance = OCTOSPI1; 00138 00139 /* Call the DeInit function to reset the driver */ 00140 if (HAL_OSPI_DeInit(&OSPINORHandle) != HAL_OK) 00141 { 00142 return OSPI_NOR_ERROR; 00143 } 00144 00145 /* System level initialization */ 00146 OSPI_NOR_MspInit(); 00147 00148 /* OctoSPI initialization */ 00149 OSPINORHandle.Init.FifoThreshold = 4; 00150 OSPINORHandle.Init.DualQuad = HAL_OSPI_DUALQUAD_DISABLE; 00151 OSPINORHandle.Init.DeviceSize = POSITION_VAL(MX25LM51245G_FLASH_SIZE); /* 512 MBits */ 00152 OSPINORHandle.Init.ChipSelectHighTime = 2; 00153 OSPINORHandle.Init.FreeRunningClock = HAL_OSPI_FREERUNCLK_DISABLE; 00154 OSPINORHandle.Init.ClockMode = HAL_OSPI_CLOCK_MODE_0; 00155 OSPINORHandle.Init.WrapSize = HAL_OSPI_WRAP_NOT_SUPPORTED; 00156 OSPINORHandle.Init.ClockPrescaler = 2; /* OctoSPI clock = 120MHz / ClockPrescaler = 60MHz */ 00157 OSPINORHandle.Init.SampleShifting = HAL_OSPI_SAMPLE_SHIFTING_NONE; 00158 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00159 OSPINORHandle.Init.MemoryType = HAL_OSPI_MEMTYPE_MICRON; 00160 OSPINORHandle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_DISABLE; 00161 #else 00162 OSPINORHandle.Init.MemoryType = HAL_OSPI_MEMTYPE_MACRONIX; 00163 OSPINORHandle.Init.DelayHoldQuarterCycle = HAL_OSPI_DHQC_ENABLE; 00164 #endif 00165 OSPINORHandle.Init.ChipSelectBoundary = 0; 00166 00167 if (HAL_OSPI_Init(&OSPINORHandle) != HAL_OK) 00168 { 00169 return OSPI_NOR_ERROR; 00170 } 00171 00172 /* OctoSPI IO Manager configuration */ 00173 OSPIM_Cfg_Struct.ClkPort = 2; 00174 OSPIM_Cfg_Struct.DQSPort = 2; 00175 OSPIM_Cfg_Struct.IOHighPort = HAL_OSPIM_IOPORT_2_HIGH; 00176 OSPIM_Cfg_Struct.IOLowPort = HAL_OSPIM_IOPORT_2_LOW; 00177 OSPIM_Cfg_Struct.NCSPort = 2; 00178 00179 if (HAL_OSPIM_Config(&OSPINORHandle, &OSPIM_Cfg_Struct, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00180 { 00181 return OSPI_NOR_ERROR; 00182 } 00183 00184 /* OctoSPI memory reset */ 00185 if (OSPI_NOR_ResetMemory(&OSPINORHandle) != OSPI_NOR_OK) 00186 { 00187 return OSPI_NOR_NOT_SUPPORTED; 00188 } 00189 00190 /* Insert delay */ 00191 HAL_Delay(1); 00192 00193 /* OctoSPI octal enable */ 00194 if (OSPI_NOR_OctalMode(&OSPINORHandle, OSPI_NOR_OCTAL_ENABLE) != OSPI_NOR_OK) 00195 { 00196 return OSPI_NOR_ERROR; 00197 } 00198 00199 return OSPI_NOR_OK; 00200 } 00201 00202 /** 00203 * @brief De-Initializes the OSPI interface. 00204 * @retval OSPI memory status 00205 */ 00206 uint8_t BSP_OSPI_NOR_DeInit(void) 00207 { 00208 OSPINORHandle.Instance = OCTOSPI1; 00209 00210 /* Abort any activity on OctoSPI (eg Memory-mapped mode) */ 00211 if (HAL_OSPI_GetState(&OSPINORHandle) != HAL_OSPI_STATE_READY) 00212 { 00213 if (HAL_OSPI_Abort(&OSPINORHandle) != HAL_OK) 00214 { 00215 return OSPI_NOR_ERROR; 00216 } 00217 } 00218 00219 /* OctoSPI octal mode disable */ 00220 if (OSPI_NOR_OctalMode(&OSPINORHandle, OSPI_NOR_OCTAL_DISABLE) != OSPI_NOR_OK) 00221 { 00222 return OSPI_NOR_ERROR; 00223 } 00224 00225 /* Call the DeInit function to reset the driver */ 00226 if (HAL_OSPI_DeInit(&OSPINORHandle) != HAL_OK) 00227 { 00228 return OSPI_NOR_ERROR; 00229 } 00230 00231 /* System level De-initialization */ 00232 OSPI_NOR_MspDeInit(); 00233 00234 return OSPI_NOR_OK; 00235 } 00236 00237 /** 00238 * @brief Reads an amount of data from the OSPI memory. 00239 * @param pData: Pointer to data to be read 00240 * @param ReadAddr: Read start address 00241 * @param Size: Size of data to read 00242 * @retval OSPI memory status 00243 */ 00244 uint8_t BSP_OSPI_NOR_Read(uint8_t* pData, uint32_t ReadAddr, uint32_t Size) 00245 { 00246 OSPI_RegularCmdTypeDef sCommand; 00247 00248 /* Initialize the read command */ 00249 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00250 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00251 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00252 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00253 sCommand.Address = ReadAddr; 00254 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00255 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00256 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00257 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00258 sCommand.NbData = Size; 00259 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00260 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00261 00262 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00263 sCommand.Instruction = OCTAL_IO_READ_CMD; 00264 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00265 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00266 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00267 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00268 #else 00269 sCommand.Instruction = OCTAL_IO_DTR_READ_CMD; 00270 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00271 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00272 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00273 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00274 #endif 00275 00276 /* Configure the command */ 00277 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00278 { 00279 return OSPI_NOR_ERROR; 00280 } 00281 00282 /* Reception of the data */ 00283 if (HAL_OSPI_Receive(&OSPINORHandle, pData, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00284 { 00285 return OSPI_NOR_ERROR; 00286 } 00287 00288 return OSPI_NOR_OK; 00289 } 00290 00291 /** 00292 * @brief Writes an amount of data to the OSPI memory. 00293 * @param pData: Pointer to data to be written 00294 * @param WriteAddr: Write start address 00295 * @param Size: Size of data to write 00296 * @retval OSPI memory status 00297 */ 00298 uint8_t BSP_OSPI_NOR_Write(uint8_t* pData, uint32_t WriteAddr, uint32_t Size) 00299 { 00300 OSPI_RegularCmdTypeDef sCommand; 00301 uint32_t end_addr, current_size, current_addr; 00302 00303 /* Calculation of the size between the write address and the end of the page */ 00304 current_size = MX25LM51245G_PAGE_SIZE - (WriteAddr % MX25LM51245G_PAGE_SIZE); 00305 00306 /* Check if the size of the data is less than the remaining place in the page */ 00307 if (current_size > Size) 00308 { 00309 current_size = Size; 00310 } 00311 00312 /* Initialize the adress variables */ 00313 current_addr = WriteAddr; 00314 end_addr = WriteAddr + Size; 00315 00316 /* Initialize the program command */ 00317 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00318 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00319 sCommand.Instruction = OCTAL_PAGE_PROG_CMD; 00320 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00321 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00322 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00323 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00324 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00325 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00326 sCommand.DummyCycles = 0; 00327 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00328 00329 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00330 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00331 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00332 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00333 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00334 #else 00335 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00336 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00337 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00338 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00339 #endif 00340 00341 /* Perform the write page by page */ 00342 do 00343 { 00344 sCommand.Address = current_addr; 00345 sCommand.NbData = current_size; 00346 00347 /* Enable write operations */ 00348 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00349 { 00350 return OSPI_NOR_ERROR; 00351 } 00352 00353 /* Configure the command */ 00354 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00355 { 00356 return OSPI_NOR_ERROR; 00357 } 00358 00359 /* Transmission of the data */ 00360 if (HAL_OSPI_Transmit(&OSPINORHandle, pData, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00361 { 00362 return OSPI_NOR_ERROR; 00363 } 00364 00365 /* Configure automatic polling mode to wait for end of program */ 00366 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != OSPI_NOR_OK) 00367 { 00368 return OSPI_NOR_ERROR; 00369 } 00370 00371 /* Update the address and size variables for next page programming */ 00372 current_addr += current_size; 00373 pData += current_size; 00374 current_size = ((current_addr + MX25LM51245G_PAGE_SIZE) > end_addr) ? (end_addr - current_addr) : MX25LM51245G_PAGE_SIZE; 00375 } while (current_addr < end_addr); 00376 00377 return OSPI_NOR_OK; 00378 } 00379 00380 /** 00381 * @brief Erases the specified block of the OSPI memory. 00382 * @param BlockAddress: Block address to erase 00383 * @retval OSPI memory status 00384 */ 00385 uint8_t BSP_OSPI_NOR_Erase_Block(uint32_t BlockAddress) 00386 { 00387 OSPI_RegularCmdTypeDef sCommand; 00388 00389 /* Initialize the erase command */ 00390 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00391 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00392 sCommand.Instruction = OCTAL_BLOCK_ERASE_CMD; 00393 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00394 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00395 sCommand.Address = BlockAddress; 00396 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00397 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00398 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00399 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00400 sCommand.DummyCycles = 0; 00401 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00402 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00403 00404 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00405 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00406 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00407 #else 00408 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00409 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00410 #endif 00411 00412 /* Enable write operations */ 00413 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00414 { 00415 return OSPI_NOR_ERROR; 00416 } 00417 00418 /* Send the command */ 00419 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00420 { 00421 return OSPI_NOR_ERROR; 00422 } 00423 00424 /* Configure automatic polling mode to wait for end of erase */ 00425 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, MX25LM51245G_BLOCK_ERASE_MAX_TIME) != OSPI_NOR_OK) 00426 { 00427 return OSPI_NOR_ERROR; 00428 } 00429 00430 return OSPI_NOR_OK; 00431 } 00432 00433 /** 00434 * @brief Erases the specified sector of the OSPI memory. 00435 * @param Sector: Sector address to erase (0 to 255) 00436 * @retval OSPI memory status 00437 * @note This function is non blocking meaning that sector erase 00438 * operation is started but not completed when the function 00439 * returns. Application has to call BSP_QSPI_GetStatus() 00440 * to know when the device is available again (i.e. erase operation 00441 * completed). 00442 */ 00443 uint8_t BSP_OSPI_NOR_Erase_Sector(uint32_t Sector) 00444 { 00445 OSPI_RegularCmdTypeDef sCommand; 00446 00447 if (Sector >= (uint32_t)(MX25LM51245G_FLASH_SIZE/MX25LM51245G_SECTOR_SIZE)) 00448 { 00449 return OSPI_NOR_ERROR; 00450 } 00451 00452 /* Initialize the erase command */ 00453 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00454 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00455 sCommand.Instruction = OCTAL_SECTOR_ERASE_CMD; 00456 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00457 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00458 sCommand.Address = (Sector * MX25LM51245G_SECTOR_SIZE); 00459 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00460 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00461 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00462 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00463 sCommand.DummyCycles = 0; 00464 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00465 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00466 00467 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00468 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00469 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00470 #else 00471 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00472 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00473 #endif 00474 00475 /* Enable write operations */ 00476 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00477 { 00478 return OSPI_NOR_ERROR; 00479 } 00480 00481 /* Send the command */ 00482 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00483 { 00484 return OSPI_NOR_ERROR; 00485 } 00486 00487 return OSPI_NOR_OK; 00488 } 00489 00490 /** 00491 * @brief Erases the entire OSPI memory. 00492 * @retval OSPI memory status 00493 */ 00494 uint8_t BSP_OSPI_NOR_Erase_Chip(void) 00495 { 00496 OSPI_RegularCmdTypeDef sCommand; 00497 00498 /* Initialize the erase command */ 00499 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00500 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00501 sCommand.Instruction = OCTAL_CHIP_ERASE_CMD; 00502 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00503 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00504 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00505 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00506 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00507 sCommand.DummyCycles = 0; 00508 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00509 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00510 00511 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00512 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00513 #else 00514 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00515 #endif 00516 00517 /* Enable write operations */ 00518 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00519 { 00520 return OSPI_NOR_ERROR; 00521 } 00522 00523 /* Send the command */ 00524 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00525 { 00526 return OSPI_NOR_ERROR; 00527 } 00528 00529 /* Configure automatic polling mode to wait for end of erase */ 00530 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, MX25LM51245G_CHIP_ERASE_MAX_TIME) != OSPI_NOR_OK) 00531 { 00532 return OSPI_NOR_ERROR; 00533 } 00534 00535 return OSPI_NOR_OK; 00536 } 00537 00538 /** 00539 * @brief Reads current status of the OSPI memory. 00540 * @retval OSPI memory status 00541 */ 00542 uint8_t BSP_OSPI_NOR_GetStatus(void) 00543 { 00544 OSPI_RegularCmdTypeDef sCommand; 00545 uint8_t reg[2]; 00546 00547 /* Initialize the read security register command */ 00548 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00549 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00550 sCommand.Instruction = OCTAL_READ_SECURITY_REG_CMD; 00551 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00552 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00553 sCommand.Address = 0; 00554 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00555 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00556 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00557 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00558 sCommand.NbData = 2; 00559 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00560 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00561 00562 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00563 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00564 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00565 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00566 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00567 #else 00568 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00569 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00570 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00571 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00572 #endif 00573 00574 /* Configure the command */ 00575 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00576 { 00577 return OSPI_NOR_ERROR; 00578 } 00579 00580 /* Reception of the data */ 00581 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00582 { 00583 return OSPI_NOR_ERROR; 00584 } 00585 00586 /* Check the value of the register */ 00587 if ((reg[0] & (MX25LM51245G_SECR_P_FAIL | MX25LM51245G_SECR_E_FAIL)) != 0) 00588 { 00589 return OSPI_NOR_ERROR; 00590 } 00591 else if ((reg[0] & (MX25LM51245G_SECR_PSB | MX25LM51245G_SECR_ESB)) != 0) 00592 { 00593 return OSPI_NOR_SUSPENDED; 00594 } 00595 00596 /* Initialize the read status register command */ 00597 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 00598 00599 /* Configure the command */ 00600 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00601 { 00602 return OSPI_NOR_ERROR; 00603 } 00604 00605 /* Reception of the data */ 00606 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00607 { 00608 return OSPI_NOR_ERROR; 00609 } 00610 00611 /* Check the value of the register */ 00612 if ((reg[0] & MX25LM51245G_SR_WIP) != 0) 00613 { 00614 return OSPI_NOR_BUSY; 00615 } 00616 else 00617 { 00618 return OSPI_NOR_OK; 00619 } 00620 } 00621 00622 /** 00623 * @brief Return the configuration of the OSPI memory. 00624 * @param pInfo: pointer on the configuration structure 00625 * @retval OSPI memory status 00626 */ 00627 uint8_t BSP_OSPI_NOR_GetInfo(OSPI_NOR_Info* pInfo) 00628 { 00629 /* Configure the structure with the memory configuration */ 00630 pInfo->FlashSize = MX25LM51245G_FLASH_SIZE; 00631 pInfo->EraseSectorSize = MX25LM51245G_BLOCK_SIZE; 00632 pInfo->EraseSectorsNumber = (MX25LM51245G_FLASH_SIZE/MX25LM51245G_BLOCK_SIZE); 00633 pInfo->ProgPageSize = MX25LM51245G_PAGE_SIZE; 00634 pInfo->ProgPagesNumber = (MX25LM51245G_FLASH_SIZE/MX25LM51245G_PAGE_SIZE); 00635 00636 return OSPI_NOR_OK; 00637 } 00638 00639 /** 00640 * @brief Configure the OSPI in memory-mapped mode 00641 * @retval OSPI memory status 00642 */ 00643 uint8_t BSP_OSPI_NOR_EnableMemoryMappedMode(void) 00644 { 00645 OSPI_RegularCmdTypeDef sCommand; 00646 OSPI_MemoryMappedTypeDef sMemMappedCfg; 00647 00648 /* Enable write operations */ 00649 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 00650 { 00651 return OSPI_NOR_ERROR; 00652 } 00653 00654 /* Configure the command for the read instruction */ 00655 sCommand.OperationType = HAL_OSPI_OPTYPE_READ_CFG; 00656 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00657 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00658 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00659 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 00660 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 00661 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00662 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 00663 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 00664 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00665 00666 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00667 sCommand.Instruction = OCTAL_IO_READ_CMD; 00668 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00669 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 00670 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 00671 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00672 #else 00673 sCommand.Instruction = OCTAL_IO_DTR_READ_CMD; 00674 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00675 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 00676 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 00677 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 00678 #endif 00679 00680 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00681 { 00682 return OSPI_NOR_ERROR; 00683 } 00684 00685 /* Configure the command for the write instruction */ 00686 sCommand.OperationType = HAL_OSPI_OPTYPE_WRITE_CFG; 00687 sCommand.Instruction = OCTAL_PAGE_PROG_CMD; 00688 sCommand.DummyCycles = 0; 00689 00690 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00691 { 00692 return OSPI_NOR_ERROR; 00693 } 00694 00695 /* Configure the memory mapped mode */ 00696 sMemMappedCfg.TimeOutActivation = HAL_OSPI_TIMEOUT_COUNTER_DISABLE; 00697 00698 if (HAL_OSPI_MemoryMapped(&OSPINORHandle, &sMemMappedCfg) != HAL_OK) 00699 { 00700 return OSPI_NOR_ERROR; 00701 } 00702 00703 return OSPI_NOR_OK; 00704 } 00705 00706 /** 00707 * @brief This function suspends an ongoing erase command. 00708 * @retval OSPI memory status 00709 */ 00710 uint8_t BSP_OSPI_NOR_SuspendErase(void) 00711 { 00712 OSPI_RegularCmdTypeDef sCommand; 00713 00714 /* Check whether the device is busy (erase operation is 00715 in progress). 00716 */ 00717 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_BUSY) 00718 { 00719 /* Initialize the suspend command */ 00720 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00721 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00722 sCommand.Instruction = OCTAL_PROG_ERASE_SUSPEND_CMD; 00723 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00724 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00725 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00726 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00727 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00728 sCommand.DummyCycles = 0; 00729 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00730 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00731 00732 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00733 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00734 #else 00735 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00736 #endif 00737 00738 /* Send the command */ 00739 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00740 { 00741 return OSPI_NOR_ERROR; 00742 } 00743 00744 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_SUSPENDED) 00745 { 00746 return OSPI_NOR_OK; 00747 } 00748 00749 return OSPI_NOR_ERROR; 00750 } 00751 00752 return OSPI_NOR_OK; 00753 } 00754 00755 /** 00756 * @brief This function resumes a paused erase command. 00757 * @retval OSPI memory status 00758 */ 00759 uint8_t BSP_OSPI_NOR_ResumeErase(void) 00760 { 00761 OSPI_RegularCmdTypeDef sCommand; 00762 00763 /* Check whether the device is in suspended state */ 00764 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_SUSPENDED) 00765 { 00766 /* Initialize the resume command */ 00767 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00768 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00769 sCommand.Instruction = OCTAL_PROG_ERASE_RESUME_CMD; 00770 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00771 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00772 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00773 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00774 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00775 sCommand.DummyCycles = 0; 00776 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00777 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00778 00779 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00780 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00781 #else 00782 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00783 #endif 00784 00785 /* Send the command */ 00786 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00787 { 00788 return OSPI_NOR_ERROR; 00789 } 00790 00791 /* 00792 When this command is executed, the status register write in progress bit is set to 1, and 00793 the flag status register program erase controller bit is set to 0. This command is ignored 00794 if the device is not in a suspended state. 00795 */ 00796 00797 if (BSP_OSPI_NOR_GetStatus() == OSPI_NOR_BUSY) 00798 { 00799 return OSPI_NOR_OK; 00800 } 00801 00802 return OSPI_NOR_ERROR; 00803 } 00804 00805 return OSPI_NOR_OK; 00806 } 00807 00808 /** 00809 * @brief This function enter the OSPI memory in deep power down mode. 00810 * @retval OSPI memory status 00811 */ 00812 uint8_t BSP_OSPI_NOR_EnterDeepPowerDown(void) 00813 { 00814 OSPI_RegularCmdTypeDef sCommand; 00815 00816 /* Initialize the deep power down command */ 00817 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00818 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00819 sCommand.Instruction = OCTAL_ENTER_DEEP_POWER_DOWN_CMD; 00820 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00821 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00822 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00823 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00824 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00825 sCommand.DummyCycles = 0; 00826 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00827 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00828 00829 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00830 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00831 #else 00832 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00833 #endif 00834 00835 /* Send the command */ 00836 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00837 { 00838 return OSPI_NOR_ERROR; 00839 } 00840 00841 /* --- Memory takes 10us max to enter deep power down --- */ 00842 00843 return OSPI_NOR_OK; 00844 } 00845 00846 /** 00847 * @brief This function leave the OSPI memory from deep power down mode. 00848 * @retval OSPI memory status 00849 */ 00850 uint8_t BSP_OSPI_NOR_LeaveDeepPowerDown(void) 00851 { 00852 OSPI_RegularCmdTypeDef sCommand; 00853 00854 /* Initialize the nop command */ 00855 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00856 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00857 sCommand.Instruction = OCTAL_NO_OPERATION_CMD; 00858 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 00859 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 00860 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00861 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00862 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00863 sCommand.DummyCycles = 0; 00864 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 00865 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 00866 00867 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 00868 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00869 #else 00870 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 00871 #endif 00872 00873 /* Send the command */ 00874 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 00875 { 00876 return OSPI_NOR_ERROR; 00877 } 00878 00879 /* --- A NOP command is sent to the memory, as the nCS should be low for at least 20 ns --- */ 00880 /* --- Memory takes 30us min to leave deep power down --- */ 00881 00882 return OSPI_NOR_OK; 00883 } 00884 /** 00885 * @} 00886 */ 00887 00888 /** @addtogroup STM32L4R9I_DISCOVERY_OSPI_NOR_Private_Functions 00889 * @{ 00890 */ 00891 00892 /** 00893 * @brief Initializes the OSPI MSP. 00894 * @retval None 00895 */ 00896 static void OSPI_NOR_MspInit(void) 00897 { 00898 GPIO_InitTypeDef GPIO_InitStruct; 00899 00900 /* Enable the OctoSPI memory interface clock */ 00901 __HAL_RCC_OSPIM_CLK_ENABLE(); 00902 __HAL_RCC_OSPI1_CLK_ENABLE(); 00903 00904 /* Reset the OctoSPI memory interface */ 00905 __HAL_RCC_OSPI1_FORCE_RESET(); 00906 __HAL_RCC_OSPI1_RELEASE_RESET(); 00907 00908 /* Enable GPIO clocks */ 00909 /* IOSV bit MUST be set to access GPIO port G[2:15] */ 00910 __HAL_RCC_PWR_CLK_ENABLE(); 00911 SET_BIT(PWR->CR2, PWR_CR2_IOSV); 00912 00913 __HAL_RCC_GPIOG_CLK_ENABLE(); 00914 __HAL_RCC_GPIOH_CLK_ENABLE(); 00915 __HAL_RCC_GPIOI_CLK_ENABLE(); 00916 00917 /* OctoSPI CS GPIO pin configuration */ 00918 GPIO_InitStruct.Pin = GPIO_PIN_12; 00919 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 00920 GPIO_InitStruct.Pull = GPIO_PULLUP; 00921 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 00922 GPIO_InitStruct.Alternate = GPIO_AF5_OCTOSPIM_P2; 00923 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00924 00925 /* OctoSPI DQS GPIO pins configuration */ 00926 GPIO_InitStruct.Pin = GPIO_PIN_15; 00927 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00928 00929 /* OctoSPI CLK, D0, D1 and D2 GPIO pins configuration */ 00930 GPIO_InitStruct.Pin = (GPIO_PIN_6 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11); 00931 GPIO_InitStruct.Pull = GPIO_NOPULL; 00932 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); 00933 00934 /* OctoSPI D3, D4 and D5 GPIO pins configuration */ 00935 GPIO_InitStruct.Pin = (GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10); 00936 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); 00937 00938 /* OctoSPI D6 and D7 GPIO pins configuration */ 00939 GPIO_InitStruct.Pin = (GPIO_PIN_9 | GPIO_PIN_10); 00940 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00941 } 00942 00943 /** 00944 * @brief De-Initializes the OSPI MSP. 00945 * @retval None 00946 */ 00947 static void OSPI_NOR_MspDeInit(void) 00948 { 00949 GPIO_InitTypeDef GPIO_InitStruct; 00950 00951 /* OctoSPI CLK, CS, D0-D7, DQS GPIO pins de-configuration */ 00952 HAL_GPIO_DeInit(GPIOG, (GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_12 | GPIO_PIN_15)); 00953 HAL_GPIO_DeInit(GPIOH, (GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10)); 00954 HAL_GPIO_DeInit(GPIOI, (GPIO_PIN_6 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11)); 00955 00956 /* Set GPIOG pin 12 in pull up mode (optimum default setting) */ 00957 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 00958 GPIO_InitStruct.Pin = GPIO_PIN_12; 00959 GPIO_InitStruct.Pull = GPIO_NOPULL; 00960 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 00961 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00962 00963 /* Set GPIOG pin 15 in no pull, low state (optimum default setting) */ 00964 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 00965 GPIO_InitStruct.Pull = GPIO_NOPULL; 00966 GPIO_InitStruct.Pin = GPIO_PIN_15; 00967 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 00968 HAL_GPIO_WritePin(GPIOG, GPIO_PIN_15, GPIO_PIN_RESET); 00969 00970 /* Reset the OctoSPI memory interface */ 00971 __HAL_RCC_OSPI1_FORCE_RESET(); 00972 __HAL_RCC_OSPI1_RELEASE_RESET(); 00973 00974 /* Disable the OctoSPI memory interface clock */ 00975 __HAL_RCC_OSPI1_CLK_DISABLE(); 00976 } 00977 00978 /** 00979 * @brief This function reset the OSPI memory. 00980 * @param hospi: OSPI handle 00981 * @retval None 00982 */ 00983 static uint8_t OSPI_NOR_ResetMemory(OSPI_HandleTypeDef *hospi) 00984 { 00985 OSPI_RegularCmdTypeDef sCommand; 00986 OSPI_AutoPollingTypeDef sConfig; 00987 00988 /* Initialize the reset enable command */ 00989 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 00990 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 00991 sCommand.Instruction = RESET_ENABLE_CMD; 00992 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 00993 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 00994 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 00995 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 00996 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 00997 sCommand.DataMode = HAL_OSPI_DATA_NONE; 00998 sCommand.DummyCycles = 0; 00999 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01000 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01001 01002 /* Send the command */ 01003 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01004 { 01005 return OSPI_NOR_ERROR; 01006 } 01007 01008 /* Send the reset memory command */ 01009 sCommand.Instruction = RESET_MEMORY_CMD; 01010 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01011 { 01012 return OSPI_NOR_ERROR; 01013 } 01014 01015 /* Configure automatic polling mode to wait the memory is ready */ 01016 sCommand.Instruction = READ_STATUS_REG_CMD; 01017 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01018 sCommand.NbData = 1; 01019 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01020 01021 sConfig.Match = 0; 01022 sConfig.Mask = MX25LM51245G_SR_WIP; 01023 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01024 sConfig.Interval = 0x10; 01025 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01026 01027 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01028 { 01029 return OSPI_NOR_ERROR; 01030 } 01031 01032 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01033 { 01034 return OSPI_NOR_ERROR; 01035 } 01036 01037 return OSPI_NOR_OK; 01038 } 01039 01040 /** 01041 * @brief This function send a Write Enable and wait it is effective. 01042 * @param hospi: OSPI handle 01043 * @retval None 01044 */ 01045 static uint8_t OSPI_NOR_WriteEnable(OSPI_HandleTypeDef *hospi) 01046 { 01047 OSPI_RegularCmdTypeDef sCommand; 01048 OSPI_AutoPollingTypeDef sConfig; 01049 uint8_t reg[2]; 01050 01051 /* Enable write operations */ 01052 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01053 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01054 sCommand.Instruction = OCTAL_WRITE_ENABLE_CMD; 01055 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01056 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01057 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01058 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01059 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01060 sCommand.DummyCycles = 0; 01061 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01062 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01063 01064 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01065 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01066 #else 01067 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01068 #endif 01069 01070 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01071 { 01072 return OSPI_NOR_ERROR; 01073 } 01074 01075 /* Configure automatic polling mode to wait for write enabling */ 01076 sConfig.Match = MX25LM51245G_SR_WEL; 01077 sConfig.Mask = MX25LM51245G_SR_WEL; 01078 01079 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 01080 sCommand.Address = 0x0; 01081 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01082 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01083 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01084 sCommand.NbData = 2; 01085 01086 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01087 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01088 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01089 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01090 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01091 #else 01092 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01093 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01094 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01095 sCommand.DummyCycles = 4; 01096 #endif 01097 01098 do 01099 { 01100 HAL_Delay(1); /* sConfig.Interval(0x10) / Clock(55 MHz) = 0.29 ms */ 01101 01102 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01103 { 01104 return OSPI_NOR_ERROR; 01105 } 01106 01107 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01108 { 01109 return OSPI_NOR_ERROR; 01110 } 01111 }while((reg[0] & sConfig.Mask ) != sConfig.Match); 01112 01113 return OSPI_NOR_OK; 01114 } 01115 01116 /** 01117 * @brief This function read the SR of the memory and wait the EOP. 01118 * @param hospi: OSPI handle 01119 * @param Timeout: Timeout for auto-polling 01120 * @retval None 01121 */ 01122 static uint8_t OSPI_NOR_AutoPollingMemReady(OSPI_HandleTypeDef *hospi, uint32_t Timeout) 01123 { 01124 OSPI_RegularCmdTypeDef sCommand; 01125 OSPI_AutoPollingTypeDef sConfig; 01126 uint8_t reg[2]; 01127 01128 /* Configure automatic polling mode to wait for memory ready */ 01129 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01130 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01131 sCommand.Instruction = OCTAL_READ_STATUS_REG_CMD; 01132 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01133 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01134 sCommand.Address = 0; 01135 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01136 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01137 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01138 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01139 sCommand.NbData = 2; 01140 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01141 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01142 01143 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01144 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01145 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01146 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01147 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01148 #else 01149 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01150 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01151 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01152 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01153 #endif 01154 01155 sConfig.Match = 0; 01156 sConfig.Mask = MX25LM51245G_SR_WIP; 01157 01158 do 01159 { 01160 HAL_Delay(1); /* sConfig.Interval(0x10) / Clock(55 MHz) = 0.29 ms */ 01161 01162 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01163 { 01164 return OSPI_NOR_ERROR; 01165 } 01166 01167 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01168 { 01169 return OSPI_NOR_ERROR; 01170 } 01171 }while((reg[0] & sConfig.Mask ) != sConfig.Match); 01172 01173 return OSPI_NOR_OK; 01174 } 01175 01176 /** 01177 * @brief This function enables/disables the octal mode of the memory. 01178 * @param hospi: OSPI handle 01179 * @param Operation: Octal operation mode enable/disable 01180 * @retval None 01181 */ 01182 static uint8_t OSPI_NOR_OctalMode(OSPI_HandleTypeDef *hospi, uint8_t Operation) 01183 { 01184 OSPI_RegularCmdTypeDef sCommand; 01185 OSPI_AutoPollingTypeDef sConfig; 01186 uint8_t reg[2]; 01187 01188 sCommand.OperationType = HAL_OSPI_OPTYPE_COMMON_CFG; 01189 sCommand.FlashId = HAL_OSPI_FLASH_ID_1; 01190 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01191 sCommand.AddressSize = HAL_OSPI_ADDRESS_32_BITS; 01192 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01193 sCommand.AlternateBytesMode = HAL_OSPI_ALTERNATE_BYTES_NONE; 01194 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01195 sCommand.DQSMode = HAL_OSPI_DQS_DISABLE; 01196 sCommand.SIOOMode = HAL_OSPI_SIOO_INST_EVERY_CMD; 01197 01198 sConfig.MatchMode = HAL_OSPI_MATCH_MODE_AND; 01199 sConfig.Interval = 0x10; 01200 sConfig.AutomaticStop = HAL_OSPI_AUTOMATIC_STOP_ENABLE; 01201 01202 /* Activate/deactivate the Octal mode */ 01203 if (Operation == OSPI_NOR_OCTAL_ENABLE) 01204 { 01205 /* Enable write operations */ 01206 sCommand.Instruction = WRITE_ENABLE_CMD; 01207 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 01208 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 01209 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01210 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01211 sCommand.DummyCycles = 0; 01212 01213 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01214 { 01215 return OSPI_NOR_ERROR; 01216 } 01217 01218 /* Configure automatic polling mode to wait for write enabling */ 01219 sConfig.Match = MX25LM51245G_SR_WEL; 01220 sConfig.Mask = MX25LM51245G_SR_WEL; 01221 01222 sCommand.Instruction = READ_STATUS_REG_CMD; 01223 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01224 sCommand.NbData = 1; 01225 01226 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01227 { 01228 return OSPI_NOR_ERROR; 01229 } 01230 01231 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01232 { 01233 return OSPI_NOR_ERROR; 01234 } 01235 01236 /* Write Configuration register 2 (with new dummy cycles) */ 01237 sCommand.Instruction = WRITE_CFG_REG_2_CMD; 01238 sCommand.Address = MX25LM51245G_CR2_REG3_ADDR; 01239 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01240 reg[0] = DUMMY_CYCLES_CR_CFG; 01241 01242 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01243 { 01244 return OSPI_NOR_ERROR; 01245 } 01246 01247 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01248 { 01249 return OSPI_NOR_ERROR; 01250 } 01251 01252 /* Enable write operations */ 01253 sCommand.Instruction = WRITE_ENABLE_CMD; 01254 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01255 sCommand.DataMode = HAL_OSPI_DATA_NONE; 01256 01257 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01258 { 01259 return OSPI_NOR_ERROR; 01260 } 01261 01262 /* Configure automatic polling mode to wait for write enabling */ 01263 sCommand.Instruction = READ_STATUS_REG_CMD; 01264 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01265 01266 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01267 { 01268 return OSPI_NOR_ERROR; 01269 } 01270 01271 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01272 { 01273 return OSPI_NOR_ERROR; 01274 } 01275 01276 /* Write Configuration register 2 (with Octal I/O SPI protocol) */ 01277 sCommand.Instruction = WRITE_CFG_REG_2_CMD; 01278 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01279 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01280 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01281 reg[0] = MX25LM51245G_CR2_SOPI; 01282 #else 01283 reg[0] = MX25LM51245G_CR2_DOPI; 01284 #endif 01285 01286 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01287 { 01288 return OSPI_NOR_ERROR; 01289 } 01290 01291 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01292 { 01293 return OSPI_NOR_ERROR; 01294 } 01295 01296 /* Wait that the configuration is effective and check that memory is ready */ 01297 HAL_Delay(MX25LM51245G_WRITE_REG_MAX_TIME); 01298 01299 if (OSPI_NOR_AutoPollingMemReady(&OSPINORHandle, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != OSPI_NOR_OK) 01300 { 01301 return OSPI_NOR_ERROR; 01302 } 01303 01304 /* Check the configuration has been correctly done */ 01305 sCommand.Instruction = OCTAL_READ_CFG_REG_2_CMD; 01306 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01307 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01308 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01309 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01310 sCommand.DummyCycles = DUMMY_CYCLES_READ_OCTAL; 01311 sCommand.NbData = 2; 01312 reg[0] = 0; 01313 01314 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01315 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01316 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01317 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01318 sCommand.DQSMode = HAL_OSPI_DQS_ENABLE; 01319 #endif 01320 01321 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01322 { 01323 return OSPI_NOR_ERROR; 01324 } 01325 01326 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01327 { 01328 return OSPI_NOR_ERROR; 01329 } 01330 01331 #if defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01332 if (reg[0] != MX25LM51245G_CR2_SOPI) 01333 #else 01334 if (reg[0] != MX25LM51245G_CR2_DOPI) 01335 #endif 01336 { 01337 return OSPI_NOR_ERROR; 01338 } 01339 } 01340 else 01341 { 01342 /* Enable write operations */ 01343 if (OSPI_NOR_WriteEnable(&OSPINORHandle) != OSPI_NOR_OK) 01344 { 01345 return OSPI_NOR_ERROR; 01346 } 01347 01348 /* Write Configuration register 2 (with Octal I/O SPI protocol) */ 01349 sCommand.Instruction = OCTAL_WRITE_CFG_REG_2_CMD; 01350 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_8_LINES; 01351 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_16_BITS; 01352 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01353 sCommand.AddressMode = HAL_OSPI_ADDRESS_8_LINES; 01354 sCommand.DataMode = HAL_OSPI_DATA_8_LINES; 01355 sCommand.NbData = 2; 01356 sCommand.DummyCycles = 0; 01357 reg[0] = 0; 01358 reg[1] = 0; 01359 01360 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01361 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_ENABLE; 01362 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_ENABLE; 01363 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_ENABLE; 01364 #endif 01365 01366 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01367 { 01368 return OSPI_NOR_ERROR; 01369 } 01370 01371 if (HAL_OSPI_Transmit(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01372 { 01373 return OSPI_NOR_ERROR; 01374 } 01375 01376 /* Wait that the configuration is effective and check that memory is ready */ 01377 HAL_Delay(MX25LM51245G_WRITE_REG_MAX_TIME); 01378 01379 sCommand.Instruction = READ_STATUS_REG_CMD; 01380 sCommand.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE; 01381 sCommand.InstructionSize = HAL_OSPI_INSTRUCTION_8_BITS; 01382 sCommand.AddressMode = HAL_OSPI_ADDRESS_NONE; 01383 sCommand.DataMode = HAL_OSPI_DATA_1_LINE; 01384 sCommand.NbData = 1; 01385 sCommand.DummyCycles = 0; 01386 01387 #if !defined BSP_OSPI_NOR_DDR_MODE_DEACTIVATED 01388 sCommand.InstructionDtrMode = HAL_OSPI_INSTRUCTION_DTR_DISABLE; 01389 sCommand.AddressDtrMode = HAL_OSPI_ADDRESS_DTR_DISABLE; 01390 sCommand.DataDtrMode = HAL_OSPI_DATA_DTR_DISABLE; 01391 #endif 01392 01393 sConfig.Match = 0; 01394 sConfig.Mask = MX25LM51245G_SR_WIP; 01395 01396 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01397 { 01398 return OSPI_NOR_ERROR; 01399 } 01400 01401 if (HAL_OSPI_AutoPolling(&OSPINORHandle, &sConfig, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01402 { 01403 return OSPI_NOR_ERROR; 01404 } 01405 01406 /* Check the configuration has been correctly done */ 01407 sCommand.Instruction = READ_CFG_REG_2_CMD; 01408 sCommand.Address = MX25LM51245G_CR2_REG1_ADDR; 01409 sCommand.AddressMode = HAL_OSPI_ADDRESS_1_LINE; 01410 01411 if (HAL_OSPI_Command(&OSPINORHandle, &sCommand, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01412 { 01413 return OSPI_NOR_ERROR; 01414 } 01415 01416 if (HAL_OSPI_Receive(&OSPINORHandle, reg, HAL_OSPI_TIMEOUT_DEFAULT_VALUE) != HAL_OK) 01417 { 01418 return OSPI_NOR_ERROR; 01419 } 01420 01421 if (reg[0] != 0) 01422 { 01423 return OSPI_NOR_ERROR; 01424 } 01425 } 01426 01427 return OSPI_NOR_OK; 01428 } 01429 01430 /** 01431 * @} 01432 */ 01433 01434 /** 01435 * @} 01436 */ 01437 01438 /** 01439 * @} 01440 */ 01441 01442 /** 01443 * @} 01444 */ 01445 01446 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 01447
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