STM32L476G_EVAL BSP User Manual: stm32l476g_eval_nor.h Source File

STM32L476G_EVAL BSP

stm32l476g_eval_nor.h
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00001 /**
00002   ******************************************************************************
00003   * @file    stm32l476g_eval_nor.h
00004   * @author  MCD Application Team
00005   * @version $VERSION$
00006   * @date    $DATE$
00007   * @brief   This file contains the common defines and functions prototypes for
00008   *          the stm32l476g_eval_nor.c driver.
00009   ******************************************************************************
00010   * @attention
00011   *
00012   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
00013   *
00014   * Redistribution and use in source and binary forms, with or without modification,
00015   * are permitted provided that the following conditions are met:
00016   *   1. Redistributions of source code must retain the above copyright notice,
00017   *      this list of conditions and the following disclaimer.
00018   *   2. Redistributions in binary form must reproduce the above copyright notice,
00019   *      this list of conditions and the following disclaimer in the documentation
00020   *      and/or other materials provided with the distribution.
00021   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00022   *      may be used to endorse or promote products derived from this software
00023   *      without specific prior written permission.
00024   *
00025   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00026   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00027   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00028   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00029   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00030   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00031   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00032   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00033   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00034   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00035   *
00036   ******************************************************************************
00037   */
00038 
00039 /* Define to prevent recursive inclusion -------------------------------------*/
00040 #ifndef __STM32L476G_EVAL_NOR_H
00041 #define __STM32L476G_EVAL_NOR_H
00042 
00043 #ifdef __cplusplus
00044  extern "C" {
00045 #endif
00046 
00047 /* Includes ------------------------------------------------------------------*/
00048 #include "stm32l4xx_hal.h"
00049 
00050 /** @addtogroup BSP
00051   * @{
00052   */
00053 
00054 /** @addtogroup STM32L476G_EVAL
00055   * @{
00056   */
00057 
00058 /** @addtogroup STM32L476G_EVAL_NOR
00059   * @{
00060   */
00061 
00062 /* Exported constants --------------------------------------------------------*/ 
00063 /** @defgroup STM32L476G_EVAL_NOR_Exported_Constants Exported Constants
00064   * @{
00065   */
00066 
00067 /** 
00068   * @brief  NOR status definition
00069   */
00070 #define NOR_STATUS_OK           0x00
00071 #define NOR_STATUS_ERROR        0x01
00072 
00073 #define NOR_DEVICE_ADDR         ((uint32_t)0x64000000)
00074   
00075 /* #define NOR_MEMORY_WIDTH     FMC_NORSRAM_MEM_BUS_WIDTH_8  */
00076 #define NOR_MEMORY_WIDTH        FMC_NORSRAM_MEM_BUS_WIDTH_16
00077 
00078 #define NOR_BURSTACCESS         FMC_BURST_ACCESS_MODE_DISABLE
00079 /* #define NOR_BURSTACCESS      FMC_BURST_ACCESS_MODE_ENABLE*/
00080   
00081 #define NOR_WRITEBURST          FMC_WRITE_BURST_DISABLE
00082 /* #define NOR_WRITEBURST       FMC_WRITE_BURST_ENABLE */
00083    
00084 /* NOR operations Timeout definitions */
00085 #define BLOCKERASE_TIMEOUT      ((uint32_t)0x00A00000)  /* NOR block erase timeout */
00086 #define CHIPERASE_TIMEOUT       ((uint32_t)0x30000000)  /* NOR chip erase timeout  */ 
00087 #define PROGRAM_TIMEOUT         ((uint32_t)0x00004400)  /* NOR program timeout     */ 
00088 
00089 /* NOR Ready/Busy signal GPIO definitions */
00090 #define NOR_READY_BUSY_PIN      GPIO_PIN_6 
00091 #define NOR_READY_BUSY_GPIO     GPIOD
00092 #define NOR_READY_STATE         GPIO_PIN_SET
00093 #define NOR_BUSY_STATE          GPIO_PIN_RESET
00094 
00095 /**
00096   * @}
00097   */
00098 
00099 /* Exported functions --------------------------------------------------------*/
00100 
00101 /** @defgroup STM32L476G_EVAL_NOR_Exported_Functions Exported Functions
00102   * @{
00103   */
00104 uint8_t BSP_NOR_Init(void);
00105 uint8_t BSP_NOR_ReadData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00106 uint8_t BSP_NOR_WriteData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00107 uint8_t BSP_NOR_ProgramData(uint32_t uwStartAddress, uint16_t *pData, uint32_t uwDataSize);
00108 uint8_t BSP_NOR_Erase_Block(uint32_t BlockAddress);
00109 uint8_t BSP_NOR_Erase_Chip(void);
00110 uint8_t BSP_NOR_Read_ID(NOR_IDTypeDef *pNOR_ID);
00111 void    BSP_NOR_ReturnToReadMode(void);
00112 
00113 /**
00114   * @}
00115   */
00116 
00117 /**
00118   * @}
00119   */
00120 
00121 /**
00122   * @}
00123   */
00124 
00125 /**
00126   * @}
00127   */
00128 
00129 #ifdef __cplusplus
00130 }
00131 #endif
00132 
00133 #endif /* __STM32L476G_EVAL_NOR_H */
00134 
00135 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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