GD32F1x0: USB_LPM_Register

GD32F1x0

Macros

#define SUB_EP0REG   ((__IO unsigned *)(Reg_Base + 0x100))
 
#define LPM_CNTR   ((__IO unsigned *)(Reg_Base + 0x140))
 
#define LPM_ISTR   ((__IO unsigned *)(Reg_Base + 0x144))
 

Detailed Description

Macro Definition Documentation

#define LPM_CNTR   ((__IO unsigned *)(Reg_Base + 0x140))

LPM interrupt control register

Definition at line 85 of file usb_regs.h.

#define LPM_ISTR   ((__IO unsigned *)(Reg_Base + 0x144))

LPM interrupt status register

Definition at line 86 of file usb_regs.h.

#define SUB_EP0REG   ((__IO unsigned *)(Reg_Base + 0x100))

Sub endpoint0 register(for LPM)

Definition at line 84 of file usb_regs.h.

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