Architecture Description

Architecture Description

Figure 1 : Architecture of CLOCK_XMC4 APP

The above figure 1 represents the internal software architecture of the CLOCK_XMC4 APP. A CLOCK_XMC4 APP instance exists in a DAVE™ project with fixed attributes as shown. The APP configures SCU clock module, and conditionally GPIO module to monitor a various clocks. This in addition requires the consumption of the CPU_CTRL_XMC4 APP for handling the NMI trap based on trap event selection in event settings page of CLOCK_XMC4 APP GUI.

CLOCK_XMC4 is used by use-case APPs like: UART, PWM, SPI, CAN (top level) APPs.

Signals:

The following table presents the signals provided by the APP for connection. It also gives the flexibility to configure and extend the connectivity to other APPs.

Table 1: APP I0 signals

Signal Name	Input/Output	Availability	Description
clk_ccu_output	Output	Always	Clock input to CCU4, CCU8 and POSIF modules
clk_perbridge_output	Output	Always	Clock input to DSD module

Figure 2 explains the preferred way of clock initialization sequence, and is being used in SCU low-level driver.

Figure 2 : Clock Initialization Sequence