Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide: Member List

Kabylake Intel Firmware

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Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide
FSP_M_CONFIG Member List

This is the complete list of members for FSP_M_CONFIG, including all inherited members.

ActiveCoreCountFSP_M_CONFIG
ApertureSizeFSP_M_CONFIG
Avx2RatioOffsetFSP_M_CONFIG
Avx3RatioOffsetFSP_M_CONFIG
BclkAdaptiveVoltageFSP_M_CONFIG
BiosGuardFSP_M_CONFIG
BistOnResetFSP_M_CONFIG
BootFrequencyFSP_M_CONFIG
CaVrefConfigFSP_M_CONFIG
CleanMemoryFSP_M_CONFIG
CmdTriStateDisFSP_M_CONFIG
CoreMaxOcRatioFSP_M_CONFIG
CorePllVoltageOffsetFSP_M_CONFIG
CoreVoltageAdaptiveFSP_M_CONFIG
CoreVoltageModeFSP_M_CONFIG
CoreVoltageOffsetFSP_M_CONFIG
CoreVoltageOverrideFSP_M_CONFIG
CpuRatioFSP_M_CONFIG
CpuRatioOverrideFSP_M_CONFIG
DdrFreqLimitFSP_M_CONFIG
DllBwEn0FSP_M_CONFIG
DllBwEn1FSP_M_CONFIG
DllBwEn2FSP_M_CONFIG
DllBwEn3FSP_M_CONFIG
DmiDeEmphasisFSP_M_CONFIG
DmiGen3EndPointHintFSP_M_CONFIG
DmiGen3EndPointPresetFSP_M_CONFIG
DmiGen3ProgramStaticEqFSP_M_CONFIG
DmiGen3RootPortPresetFSP_M_CONFIG
DmiGen3RxCtlePeakingFSP_M_CONFIG
DqByteMapCh0FSP_M_CONFIG
DqByteMapCh1FSP_M_CONFIG
DqPinsInterleavedFSP_M_CONFIG
DqsMapCpu2DramCh0FSP_M_CONFIG
DqsMapCpu2DramCh1FSP_M_CONFIG
EdramRatioFSP_M_CONFIG
EnableC6DramFSP_M_CONFIG
EnableSgxFSP_M_CONFIG
EnableTraceHubFSP_M_CONFIG
EvLoaderFSP_M_CONFIG
FClkFrequencyFSP_M_CONFIG
FlashWearOutProtectionFSP_M_CONFIG
GtPllVoltageOffsetFSP_M_CONFIG
GtsExtraTurboVoltageFSP_M_CONFIG
GtsMaxOcRatioFSP_M_CONFIG
GtsVoltageModeFSP_M_CONFIG
GtsVoltageOffsetFSP_M_CONFIG
GtsVoltageOverrideFSP_M_CONFIG
GttMmAdrFSP_M_CONFIG
GttSizeFSP_M_CONFIG
GtusExtraTurboVoltageFSP_M_CONFIG
GtusMaxOcRatioFSP_M_CONFIG
GtusVoltageModeFSP_M_CONFIG
GtusVoltageOffsetFSP_M_CONFIG
GtusVoltageOverrideFSP_M_CONFIG
Heci1BarAddressFSP_M_CONFIG
Heci2BarAddressFSP_M_CONFIG
Heci3BarAddressFSP_M_CONFIG
HeciTimeoutsFSP_M_CONFIG
HyperThreadingFSP_M_CONFIG
IedSizeFSP_M_CONFIG
IgdDvmt50PreAllocFSP_M_CONFIG
InitPcieAspmAfterOpromFSP_M_CONFIG
InternalGfxFSP_M_CONFIG
JtagC10PowerGateDisableFSP_M_CONFIG
McPllVoltageOffsetFSP_M_CONFIG
MemorySpdDataLenFSP_M_CONFIG
MemorySpdPtr00FSP_M_CONFIG
MemorySpdPtr01FSP_M_CONFIG
MemorySpdPtr10FSP_M_CONFIG
MemorySpdPtr11FSP_M_CONFIG
MmaTestConfigPtrFSP_M_CONFIG
MmaTestConfigSizeFSP_M_CONFIG
MmaTestContentPtrFSP_M_CONFIG
MmaTestContentSizeFSP_M_CONFIG
MmioSizeFSP_M_CONFIG
MmioSizeAdjustmentFSP_M_CONFIG
MrcFastBootFSP_M_CONFIG
NModeSupportFSP_M_CONFIG
OcLockFSP_M_CONFIG
OcSupportFSP_M_CONFIG
OddRatioModeFSP_M_CONFIG
PcdDebugInterfaceFlagsFSP_M_CONFIG
PcdIsaSerialUartBaseFSP_M_CONFIG
PcdSerialDebugBaudRateFSP_M_CONFIG
PcdSerialDebugLevelFSP_M_CONFIG
PcdSerialIoUartNumberFSP_M_CONFIG
PchAcpiBaseFSP_M_CONFIG
PchHpetBaseFSP_M_CONFIG
PchHpetBdfValidFSP_M_CONFIG
PchHpetBusNumberFSP_M_CONFIG
PchHpetDeviceNumberFSP_M_CONFIG
PchHpetEnableFSP_M_CONFIG
PchHpetFunctionNumberFSP_M_CONFIG
PchLpcEnhancePort8xhDecodingFSP_M_CONFIG
PchNumRsvdSmbusAddressesFSP_M_CONFIG
PchPcieHsioRxSetCtleFSP_M_CONFIG
PchPcieHsioRxSetCtleEnableFSP_M_CONFIG
PchPcieHsioTxGen1DeEmphFSP_M_CONFIG
PchPcieHsioTxGen1DeEmphEnableFSP_M_CONFIG
PchPcieHsioTxGen1DownscaleAmpFSP_M_CONFIG
PchPcieHsioTxGen1DownscaleAmpEnableFSP_M_CONFIG
PchPcieHsioTxGen2DeEmph3p5FSP_M_CONFIG
PchPcieHsioTxGen2DeEmph3p5EnableFSP_M_CONFIG
PchPcieHsioTxGen2DeEmph6p0FSP_M_CONFIG
PchPcieHsioTxGen2DeEmph6p0EnableFSP_M_CONFIG
PchPcieHsioTxGen2DownscaleAmpFSP_M_CONFIG
PchPcieHsioTxGen2DownscaleAmpEnableFSP_M_CONFIG
PchPcieHsioTxGen3DownscaleAmpFSP_M_CONFIG
PchPcieHsioTxGen3DownscaleAmpEnableFSP_M_CONFIG
PchPmPciePllSscFSP_M_CONFIG
PchPort80RouteFSP_M_CONFIG
PchSataHsioRxGen1EqBoostMagFSP_M_CONFIG
PchSataHsioRxGen1EqBoostMagEnableFSP_M_CONFIG
PchSataHsioRxGen2EqBoostMagFSP_M_CONFIG
PchSataHsioRxGen2EqBoostMagEnableFSP_M_CONFIG
PchSataHsioRxGen3EqBoostMagFSP_M_CONFIG
PchSataHsioRxGen3EqBoostMagEnableFSP_M_CONFIG
PchSataHsioTxGen1DeEmphFSP_M_CONFIG
PchSataHsioTxGen1DeEmphEnableFSP_M_CONFIG
PchSataHsioTxGen1DownscaleAmpFSP_M_CONFIG
PchSataHsioTxGen1DownscaleAmpEnableFSP_M_CONFIG
PchSataHsioTxGen2DeEmphFSP_M_CONFIG
PchSataHsioTxGen2DeEmphEnableFSP_M_CONFIG
PchSataHsioTxGen2DownscaleAmpFSP_M_CONFIG
PchSataHsioTxGen2DownscaleAmpEnableFSP_M_CONFIG
PchSataHsioTxGen3DeEmphFSP_M_CONFIG
PchSataHsioTxGen3DeEmphEnableFSP_M_CONFIG
PchSataHsioTxGen3DownscaleAmpFSP_M_CONFIG
PchSataHsioTxGen3DownscaleAmpEnableFSP_M_CONFIG
PchSmbusIoBaseFSP_M_CONFIG
PcieRpEnableMaskFSP_M_CONFIG
PeciC10ResetFSP_M_CONFIG
PeciSxResetFSP_M_CONFIG
Peg0EnableFSP_M_CONFIG
Peg0MaxLinkSpeedFSP_M_CONFIG
Peg0MaxLinkWidthFSP_M_CONFIG
Peg0PowerDownUnusedLanesFSP_M_CONFIG
Peg1EnableFSP_M_CONFIG
Peg1MaxLinkSpeedFSP_M_CONFIG
Peg1MaxLinkWidthFSP_M_CONFIG
Peg1PowerDownUnusedLanesFSP_M_CONFIG
Peg2EnableFSP_M_CONFIG
Peg2MaxLinkSpeedFSP_M_CONFIG
Peg2MaxLinkWidthFSP_M_CONFIG
Peg2PowerDownUnusedLanesFSP_M_CONFIG
PegDataPtrFSP_M_CONFIG
PegDisableSpreadSpectrumClockingFSP_M_CONFIG
PegGen3RxCtlePeakingFSP_M_CONFIG
PegGpioDataFSP_M_CONFIG
PegRootPortHPEFSP_M_CONFIG
PlatformMemorySizeFSP_M_CONFIG
PrimaryDisplayFSP_M_CONFIG
PrmrrSizeFSP_M_CONFIG
ProbelessTraceFSP_M_CONFIG
RatioFSP_M_CONFIG
RcompResistorFSP_M_CONFIG
RcompTargetFSP_M_CONFIG
RealtimeMemoryTimingFSP_M_CONFIG
RefClkFSP_M_CONFIG
ReservedFspmUpdFSP_M_CONFIG
ReservedSecurityPreMemFSP_M_CONFIG
RingDownBinFSP_M_CONFIG
RingMaxOcRatioFSP_M_CONFIG
RingMinOcRatioFSP_M_CONFIG
RingPllVoltageOffsetFSP_M_CONFIG
RMTFSP_M_CONFIG
RootPortDevFSP_M_CONFIG
RootPortFunFSP_M_CONFIG
RsvdSmbusAddressTablePtrFSP_M_CONFIG
SaGvFSP_M_CONFIG
SaOcSupportFSP_M_CONFIG
SaPllVoltageOffsetFSP_M_CONFIG
SaRtd3Pcie0GpioFSP_M_CONFIG
SaRtd3Pcie1GpioFSP_M_CONFIG
SaRtd3Pcie2GpioFSP_M_CONFIG
SaVoltageOffsetFSP_M_CONFIG
SgDelayAfterHoldResetFSP_M_CONFIG
SgDelayAfterPwrEnFSP_M_CONFIG
SinitMemorySizeFSP_M_CONFIG
SkipStopPbetFSP_M_CONFIG
SmbusArpEnableFSP_M_CONFIG
SmbusEnableFSP_M_CONFIG
SmramMaskFSP_M_CONFIG
SpdProfileSelectedFSP_M_CONFIG
tCLFSP_M_CONFIG
tCWLFSP_M_CONFIG
tFAWFSP_M_CONFIG
TjMaxOffsetFSP_M_CONFIG
TraceHubMemReg0SizeFSP_M_CONFIG
TraceHubMemReg1SizeFSP_M_CONFIG
tRASFSP_M_CONFIG
tRCDtRPFSP_M_CONFIG
tREFIFSP_M_CONFIG
tRFCFSP_M_CONFIG
tRRDFSP_M_CONFIG
tRTPFSP_M_CONFIG
TsegSizeFSP_M_CONFIG
TvbRatioClippingFSP_M_CONFIG
TvbVoltageOptimizationFSP_M_CONFIG
tWRFSP_M_CONFIG
tWTRFSP_M_CONFIG
TxtFSP_M_CONFIG
TxtDprMemoryBaseFSP_M_CONFIG
TxtDprMemorySizeFSP_M_CONFIG
TxtHeapMemorySizeFSP_M_CONFIG
TxtImplementedFSP_M_CONFIG
UnusedUpdSpace0FSP_M_CONFIG
UnusedUpdSpace1FSP_M_CONFIG
UnusedUpdSpace2FSP_M_CONFIG
UnusedUpdSpace3FSP_M_CONFIG
UnusedUpdSpace4FSP_M_CONFIG
UnusedUpdSpace5FSP_M_CONFIG
UnusedUpdSpace6FSP_M_CONFIG
UnusedUpdSpace7FSP_M_CONFIG
UnusedUpdSpace8FSP_M_CONFIG
UserBdFSP_M_CONFIG
VddVoltageFSP_M_CONFIG
VmxEnableFSP_M_CONFIG
Generated on Thu Jun 28 2018 21:44:49 for Kabylake Intel(R) Firmware Support Package (FSP) Integration Guide by   doxygen 1.8.10
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