Enhanced vector extension

Asmc Macro Assembler

Asmc Macro Assembler Reference

Enhanced vector extension

From version 2.26 Asmc support the Intel AVX-512 instruction set.

This includes 12 new 128-bit registers (XMM16 to XMM31), 12 new 256-bit registers (YMM16 to YMM31), 32 new 512-bit registers (ZMM0 to ZMM31), and 8 new opmask registers (K0 to K7).

The EVEX encoding prefix will be omitted by using an EVEX exclusive instruction or any of the extended SIMD registers. A preceding prefix ({evex}) may be used for EVEX encoding of other instructions.

    vcomisd xmm0,xmm1        ; normal
    vcomisd xmm0,xmm16       ; prefix (auto)
    {evex} vcomisd xmm0,xmm1 ; prefix

See Also

Asmc Extensions | Instruction Sets